The present invention generally relates to the operation and performance of computers, and more particularly to methods and devices for increasing memory frequency range and performance of a computer through the use of an alternate source of power supplied to a computer's memory modules.
Memory bandwidth requirements of computers have steadily increased as a countermeasure against data starvation of a computer's central processor. A number of different strategies have been employed to provide better data throughput to and from the system memory pool. The three most important measures have been to increase the memory clock frequency, to increase the data rate, and to increase the number of physical banks to allow for more pages that can be held open.
As a general rule, power consumption of any integrated circuit increases in a linear fashion with the clock frequency and, therefore, the migration to higher memory core frequencies necessarily results in higher power draw. Likewise, the increased power consumption of open memory pages is well documented. Combined, the higher operating frequency, along with the increased system memory density, and higher number of ranks/open pages have reached a stage where the supply of onboard power to the memory array becomes the limiting factor for operability.
Fast transients can be buffered by means of the addition of higher capacitance in the form of electrolytic capacitors. However, there is a limitation to the effectiveness of such passive voltage buffers. Specifically, the closer the net sum of all idle and duty cycle power figures multiplied by the number of physical devices gets to the sustained supply capability of the MVRM (memory voltage regulator module) the less overhead will there be that can be converted into a power reservoir in the form or electrochemical energy. As a result, the electrolytic capacitors can also be starved and become a counterproductive asset in the net equation of power supply to the memory.
An additional concern relates to the cost-saving policies in place with many system manufacturers. That is, in the absence of detailed specifications of the power requirements that any MVRM must meet, it is up to third party manufacturers to provide more or less minimalist solutions that will work under what is referred to as typical operating conditions but will not suffice for either extreme load on the memory bus in terms of data traffic or else very high amounts of system memory. The two aforementioned scenarios are representative for high-end desktop configurations and the server environment, respectively. In both cases, insufficiencies in the memory power supply circuitry effectively pose a bottleneck for system performance and, by extension, operational stability, and can cause power related errors and memory failure.
Finally, many memory chips are able to run at higher frequencies with higher voltages as the noise margins become wider and more drive current is supplied to the memory. This increased drive current allows the clock to switch at higher frequencies as well as allowing the various internal operations of the memory, such as reading and writing, to occur much more quickly, thus increasing memory performance.
Power for standard memory subsystems (memory supply voltage; VDD/VDDQ) is typically in a range of about 2.5 to about 2.6 volts. Although a limited number of high-end motherboards (mainboards) allow for variable memory module voltage (VDIMM) up to approximately 3.0 to 3.2V, most motherboards have either no voltage adjustment capabilities due to cost considerations, or a limited voltage range due to compatibility concerns. While power drawn for memory subsystems is typically at a higher voltage (e.g. usually from the 3.3 volt rail (line) of the computers' power supply unit (PSU; e.g., an ATX Form Factor), and less frequently from the 5-volt and 12-volt lines of an ATX), circuitry on the motherboard reduces the voltage before being supplied to the memory subsystem. However, many memory chips have become much more tolerant to higher voltages as absolute maximum ratings from the semiconductor foundries have been improved. Because higher voltages to the memory chips of a computer's memory subsystem can boost memory performance and, consequently, system performance and operational stability, some computer users have resorted to modifying the motherboard to allow it to pass a higher voltage to the memory subsystem.
In view of the above, the limitations of conventional MVRM's are generally hardware-based, such that there is no headroom for improvement without taking the potentially risky step of modifying the motherboard. Even budget MVRM solutions are generally carefully balanced for an optimal price performance ratio. Any intrusion into the given equilibrium will result in shortcomings of one type or the other. Therefore, there remains a need for reducing the degree to which power supply to the memory array of a computer limits operability, with the result that better data throughput to and from the system memory pool is achieved.